Location: Tewksbury, MA

    Reports to: Director of Engineering

    Travel: Light

    Relocation assistance available


    Broadly experienced digital design engineer to architect, design and verify digital portion of Mixed Signal ASICs.  The candidate must have demonstrated success in development flow for complex digital FPGAs/ASICs including architecture, documentation, RTL design, verification, synthesis and timing analysis. Candidate will be expected to lead and be technical focus on one or more devices or device sections. Candidate will also be expected to support backend/physical design, pre- and post-silicon design validation, ATPG and ATE program development.


    • Strong design skills.
    • Excellent problem solving and advanced debugging skills
    • Capacity to lead a project and mentor others
    • Capacity to understand and own complex problems
    • Experience with sufficiently complex designs/verification tasks
    • Awareness of big-picture; systems level thinking; awareness of architectural issues in whatever they’ve worked on
    • Ground-up/clean slate architecture and code development

    • Requires MSEE/BSEE or equivalent with 8+ years’ experience in digital ASIC design and verification
    • Must have a working knowledge of Verilog
    • Must have experience with industry standard design tools
    • Experience in power management industry a plus
    • Experience in C/C++, OO coding principles also a plus
    • Experience integrating embedded processors/developing firmware a plus